The invention relates to a logic module for integrated digital circuits. By incorporating suitable circuit portions into the integrated circuit itself, the checking of its logic function is facilitated and, given very complicated circuits makes logic function checks possible where such checks were not previously considered possible.
In order to guarantee their functionability, integrated circuits are repeatedly subjected to inspections during their manufacture and use. For this purpose, the integrated circuits are operated to output a sequence of test data as a result of a suitable input sequence of test data. By means of comparison with known test data, it is determined whether the circuit tested is error-free or not.
In previous testing methods for integrated circuits, the test patterns were supplied to the item being tested by an automatic testing unit via the input pins of the test item and the test data were interrogated by the testing unit via the output pins. Both the generation of the test patterns as well as the evaluation of the test data in this case occur outside of the item being tested. Proposals hitherto known for the design of integrated digital circuits amenable to testing predominantly aim at a passive support of the standard testing methods. The possibility of also being able to directly address for testing purposes such circuit parts which are not directly accessible from the outside during normal operation is offered by integrated circuits whose internal registers can be connected together for testing purposes into a shift register chain (scan path) via which, proceeding from an additional input pin, serial data can be conducted from there to internal circuit points which otherwise have difficult access or, respectively, from there to an additional output pin.
In known testing operations, the test patterns are generated outside of the item being tested and are supplied to its via suitable adapters and contacts. A so-called "pin electronics" performs the drive of the contacts. The continuously increasing work speed and increasing length of the test patterns required for a sufficient test precision going along with increasing circuit complexity require that the pin electronics transmit and process very great data volumes within the shortest time. These demands can be met only by very complex and expensive structures upon incorporation of sufficiently large and quick control computers. The high investment in operating costs deriving therefrom for the automatic testing units force the employment of very effective testing patterns whose manual or automatic erection is in turn possible only by means of the use of very complicated simulation programs on large computers. In all, testing costs today already account for a significant portion of the total manufacturing costs of integrated digital circuits. This cost component will increase further with increasing circuit complexity. For many users, the expense required for careful testing is today already too high. In integrated circuits, one can employ a scan path for monitoring internal data flow but must then accept the disadvantage that the data can only be moved serially in the shift register chain, which leads to significant losses of time.
Further information concerning integrated circuit testing can be found in the following references, incorporated herein by reference:
(1) M. J. Y. Williams and J. B. Angell, "Enhancing Testability of Large Scale Integrated Circuits Via Test Points and Additional Logic", IEEE Trans. Computers C-22, pp. 46-60, 1973; and PA1 (2) R. A. Frohwerk, "Signature Analysis: A New Digital Field Service Method", Hewlett Packard Journal, pp. 2-8, May 1977.